1. Field of the Invention
Example embodiments of the present invention relate generally to a receiving apparatus and method thereof, and more particularly to a receiving apparatus for receiving a data signal and method thereof.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating a conventional transceiver 100. Referring to FIG. 1, the transceiver 100 may include a transmitting end 11 and a receiving end 12. If the transmitting end 11 transmits data through a serial link (e.g., a universal serial bus (USB), an advance technology attachment (ATA), etc.), noise generated by inter-symbol interference (ISI), reflection and/or crosstalk of a channel may be reduced with an adaptive equalizer 13 included within the receiving end 12. In order to synchronize a clock signal with data received by the receiving end 12, a clock data recovery circuit (CDR) 14 for recovering the clock signal from the received data may be employed. The adaptive equalizer 13 and the CDR 14 may extract an equalization coefficient and phase information associated with the clock signal from the signal transmitted through the channel in order to synchronize with the received data for proper data extraction.
However, in a number of conventional memory types (e.g., a dynamic random access memory (DRAM)), the above-described conventional process may typically not be employed due to performance degrading characteristics such as an increased latency, an increased chip area and/or an increased power consumption.
In a DRAM interface system, a distance from a memory controller to a DRAM chip may be a given distance (e.g., 20 cm). Accordingly, once the channel characteristics from the transmitting end 11 to the receiving end 12 are determined, the channel characteristics may not vary substantially over time. Thus, in DRAM interface systems, once the channel characteristics are determined, the equalization coefficient and phase information may be measured less frequently.